Applications are invited from bright, young candidates for the following post under a DST funded project

in Discipline of Electrical Engineering.

Name of Post : Junior Research Fellow (JRF)

Consolidated Monthly Pay : INR 31,000/- (consolidated)

Qualification and Experience:

• ME/MTech in Electrical/Electronics and related disciplines with >80% marks (or
• > 8.5 CPI), valid GATE score and knowledge in Analog IC Design or
• Microelectronics or equivalent. Working knowledge of CAD tools like Cadence,
• Synopsis and Mentor Graphics is required. Experience in circuit layout,
• circuit/device characterization and LINUX operating system will be preferred.

Tenure : 1 year extendable till end of project on satisfactory performance

Self-motivated students (fulfilling the above eligibility criteria), who are willing to work in the area of

Analog IC Design are encouraged to send me a mail at (nihar@iitgn.ac.in) on or before 23rd November 2020. The selection will be based on interview and shortlisted candidates will be intimated well in advance

the date and time of the interview.

Queries may be directed to Dr. Nihar Ranjan Mohapatra (Professor, EE, IIT Gandhinagar).

Detail - https://drive.google.com/file/d/1WaL7IUruI4yN8Nu1wLJfNFbjJHzNk1Su/view

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